A system on a chip (SOC) includes components such as a processor, a memory, a bus, various peripheral components coupled to the bus, and may also include programmable logic that implements user-specific functions. Once a design is implemented on an SOC, it may be necessary to analyze the performance and operations of different parts of the design as implemented on different parts of the SOC. Complicating this effort is the fact that parts of the system may be implemented as software running on a processor and other parts may be implemented as circuitry implemented in programmable logic. Thus, analysis of the behavior of the various components in the system may involve a number of test tools, each with its own interface and requirements.
As the functionality of designs becomes more data dependent and designs incorporate complex control logic and communication protocols for routing data to different parts of a design, tools that measure cycle-to-cycle behavior of a system may be overloaded with data, and dataflow analyzers may be necessary. For example, in some instances it may be necessary to analyze the system performance over a long period of time. In this scenario, profiling the cycle-to-cycle behavior of the system may generate an overwhelming amount of data. Thus, dataflow based analysis may be required. In addition, it may also be necessary to simultaneously analyze the flow of data between a processor and reconfigurable logic, or to correlate events occurring in the processor with events in hardware.
Profiling and dataflow analysis tools for processor systems have a significant disadvantage for SOCs, since they generally cannot record events occurring outside of the processor. In addition, many of these dataflow analysis tools execute on the same processor as the software that is being profiled. Thus, the execution of a dataflow tool may influence the behavior of the system being analyzed.
The present invention may address one or more of the above issues.